VPX 3 U Series 190
VPX 3 U Series 190

 

 

 

Hartmann Elektronik

VPX 3 U Series 190

The VPXbus, based on ANSI/VITA 46.0 standard, is a new industrial standard for fast serial connections. The transmission rate is approximately 2.5 Gbps per lane (X1-Link).

For this hybrid-backplane an additional VMEbus signal mapping compliant with ANSI/VITA 46.1 is implemented. The connection to the approved VMEbus is done via VME64x-J1 slots. ALL Hartmann VMEbus boards are based on the HIGH-SPEED DESIGN concept. Low reflection is achieved by means of uniform signal line surge impedance. Shielding of each individual signal line assures minimal coupling and therefore guarantees trouble-free operation.

Termination

In order to prevent interference on signal lines which might result from reflection at open line ends, these lines must be terminated on the VMEbus. A distinction is made between passive and active termination. The advantage of active termination is reduced closed-circuit current consumption. Passive termination features better frequency response.

Automatic daisy chaining

For this VPX-Backplane daisy chaining is implemented using an integrated OR logic. This logic closes the daisy chain when the daughter board is removed.

Chassis GND connection

There is a solid electrically conductive chassis GND surface in the backplaneto-card rack mounting area. This guarantees EMC-tight mounting of the bus board on the card rack.
HF coupling of card rack and system ground is implemented for VPX by capacitors (10 nF, 200 V in each slot). Static charges are discharged with a resistor (≥ 1 MΩ).
An additional Chassis-GND connection is provided with a M4 terminal screw.

Power connections

The main operating voltages and GND are supplied with M4 screw terminals. The auxiliary operating voltages are supplied via M3 screw terminals. Optimal daughter board supply and trouble-free operation are ensured by the arrangement of the feed modules on the backplane.

Standard VPX Slot Keying for 3 U Backplanes (Values in degree)

Slot
 1
 2
 3
 4
 5
 6
 7
 8
 9
 10
 11
1
 270
 315
 0
 45
 90
 270
 315
 0
 45
 90
 270
2
 270
 270
 270
 270
 270
 315
 315
 315
 315
 315
 0
Slot
 12
 13
 14
 15
 16
 17
 18
 19
 20
 21
1
 315
 0
 45
 90
 270
 315
 0
 45
 90
 270
2
 0
 0
 0
 0
 45
 45
 45
 45
 45
 90

 

The standard orientation of coding keys is anytime changeable by the customer.
For backplanes made by Hartmann Elektronik every key for every slot is settable to all 5 possible positions.

Utility connector

There are 2 connectors for systemmanagement IPMB and SMB.
IPMB_PWR and SMB_PWR are connectable to power with 3-pin feedthrough connectors (X2 and X4). Usable voltages for IPMB are 5 V/3.3 V-AUX and for SMB 5 V/+5 V STBY.

JTAG connector

In addition 2 JTAG-plugs for VPXSlots 4 (X200) and 8 (X201) are available.

Jumper

Normally a battery voltage with approximately 3 V is available at Pin VBAT of connector VPX-J1. The voltage is externally accessible with connector X5 or internally using 3.3 V_AUX by closing jumper BR2.
If jumper BR1 is closed NVRMO is set to memory writeable.

System Controller Modul

The first VPX-Slot is provided for a system controller module. In this case jumper BR3 has to be closed.

Pin Assignments

NC = not connected
Pin
 IPMB
(X1)
 IPMB_ PWR (X2)
 SMB
(X3)
 SMB_ PWR (X4)
 JTAG
(X200, X201)
 VBAT
(X5)
 BR1
 BR2
 BR3
1
 IPMB_ SCL
 +5 V
 SMB_ SCL
 +5 V
 GND
 GND
 NVMRO
 +3.3 V_AUX
 SYS_ CON*
2
 GND
 IPMB_ PWR
 GND
 SMB_ PWR
 TCK
 +3 V Batterie
 GND
 + VBAT
 GND
3
 IPMB_ SDA
 +3.3 V_AUX
 SMB_ SDA
 +5 V STBY
 TMS



4
 IPMB_ PWR
SMB_ PWR
TRST*



5
 NC
SMB_ ALERT
TDI



6



TDO



Pin Assignments J0 VPX Utility Connector

VS1 = 12 V, VS2 = 3.3 V, VS3 = 5 V
* low-active
Pin
ROW A
 ROW B
 ROW C
 ROW D
 ROW E
 ROW F
 ROW G
 ROW H
 ROW I
1
 VS2
 VS2
 VS2
 VS2
 None
 VS1
 VS1
 VS1
 VS1
2
 VS2
 VS2
 VS2
 VS2
 None
 VS1
 VS1
 VS1
 VS1
3
 VS3
 VS3
 VS3
 VS3
 None
 VS3
 VS3
 VS3
 VS3
4
 GND
 NVMRO
 SYS- RESET*
 GND
 -12 V_AUX
 GND
 SM3
 SM2
 GND
5
 GND
 SM1
 SM0
 GND
 3.3 V_AUX
 GND
 GA4*
 GAP*
 GND
6
 GND
 GA0*
 GA1*
 GND
 +12 V_AUX
 GND
 GA2*
 GA3*
 GND
7
 TRST*
 TMS
 GND
 GND
 TDI
 TDO
 GND
 GND
 TCK
8
 GND
 GND
 RES_ BUS+
 RES_ BUS-
 GND
 GND
 REF_ CLK+
 REF_ CLK-
 GND

Pin Assignments J1 VPX Fabric for PXI Express - Fat Pipes x4

Pin
ROW A
 ROW B
 ROW C
 ROW D
 ROW E
 ROW F
 ROW G
 ROW H
 ROW I
1
 PA- RX0+
 PA- RX0-
 GND
 GND
 PA- TX0+
 PA- TX0-
 GND
 GND
 RESBUS_SE
2
 GND
 GND
 PA- RX1+
 PA- RX1-
 GND
 GND
 PA- TX1+
 PA- TX1-
 GND
3
 PA- RX2+
 PA- RX2-
 GND
 GND
 PA- TX2+
 PA- TX2-
 GND
 GND
 VBAT
4
 GND
 GND
 PA- RX3+
 PA- RX3-
 GND
 GND
 PA- TX3+
 PA- TX3-
 GND
5
 PB- RX0+
 PB- RX0-
 GND
 GND
 PB- TX0+
 PB- TX0-
 GND
 GND
 SYS_CON*
6
 GND
 GND
 PB- RX1+
 PB- RX1-
 GND
 GND
 PB- TX1+
 PB- TX1-
 GND
7
 PB- RX2+
 PB- RX2-
 GND
 GND
 PB- TX2+
 PB- TX2-
 GND
 GND
 REFCLK0_SE
8
 GND
 GND
 PB- RX3+
 PB- RX3-
 GND
 GND
 PB- TX3+
 PB- TX3-
 GND
9
 PC- RX0+
 PC- RX0-
 GND
 GND
 PC- TX0+
 PC- TX0-
 GND
 GND
 REFCLK1_SE
10
 GND
 GND
 PC- RX1+
 PC- RX1-
 GND
 GND
 PC- TX1+
 PC- TX1-
 GND
11
 PC- RX2+
 PC- RX2-
 GND
 GND
 PC- TX2+
 PC- TX2-
 GND
 GND
 REFCLK2_SE
12
 GND
 GND
 PC- RX3+
 PC- RX3-
 GND
 GND
 PC- TX3+
 PC- TX3-
 GND
13
 PD- RX0+
 PD- RX0-
 GND
 GND
 PD- TX0+
 PD- TX0-
 GND
 GND
 REFCLK3_SE
14
 GND
 GND
 PD- RX1+
 PD- RX1-
 GND
 GND
 PD- TX1+
 PD- TX1-
 GND
15
 PD- RX2+
 PD- RX2-
 GND
 GND
 PD- TX2+
 PD- TX2-
 GND
 GND
 SE7
16
 GND
 GND
 PD- RX3+
 PD- RX3-
 GND
 GND
 PD- TX3+
 PD- TX3-
 GND

 

Pin Assignment on VPX J1 shows a 4x4 mapping (4 links with 4 lanes per link). This 5-slot VPX Backplane has a Full-Mesh topology.

Pin Assignments J2 VPX VME on VPX, Single Ended

* low-active
Pin
ROW A
 ROW B
 ROW C
 ROW D
 ROW E
 ROW F
 ROW G
 ROW H
 ROW I
1
 GND
 D00
 SYSFAIL*
 GND
 BBSY*
 GND
 ACFAIL*
 D08
 GND
2
 GND
 D01
 BR0*
 GND
 BCLR*
 GND
 BG2IN*
 D09
 GND
3
 GND
 D02
 BR1*
 GND
 BG0IN*
 GND
 BG2OUT*
 D10
 GND
4
 GND
 D03
 BR2*
 GND
 BG0OUT*
 GND
 BG3IN*
 D11
 GND
5
 GND
 D04
 BR3*
 GND
 BG1IN*
 GND
 BG3OUT*
 D12
 GND
6
 GND
 D05
 AM0
 GND
 BG1OUT*
 GND
 BERR*
 D13
 GND
7
 GND
 D06
 AM1
 GND
 SYSCLK
 GND
 LWORD*
 D14
 GND
8
 GND
 D07
 AM2
 GND
 DS1*
 GND
 AM5
 D15
 GND
9
 GND
 AM4
 AM3
 GND
 DS0*
 GND
 A23
 A22
 GND
10
 GND
 A07
 IRQ7*
 GND
 WRITE*
 GND
 A21
 A20
 GND
11
 GND
 A06
 IRQ6*
 GND
 DTACK*
 GND
 A19
 A18
 GND
12
 GND
 A05
 IRQ5*
 GND
 AS*
 GND
 A17
 A16
 GND
13
 GND
 A04
 IRQ4*
 GND
 IACK*
 GND
 A15
 A14
 GND
14
 GND
 A03
 IRQ3*
 GND
 IACKIN*
 GND
 A13
 A12
 GND
15
 GND
 A02
 IRQ2*
 GND
 IACKOUT*
 GND
 A11
 A10
 GND
16
 GND
 A01
 IRQ1*
 GND
 RETRY*
 GND
 A09
 A08
 GND

Pin Assignments J1 VME

* low-active
Pin
 ROW Z
VME64x		 ROW A
VME		 ROW B
VME		 ROW C
VME		 ROW D - Slot 1
VME64x		 ROW D
VME64x
1
 MPR
 D00
 BBSY*
 D08
 VPC
 VPC
2
 GND
 D01
 BCLR*
 D09
 GND
 GND
3
 MCLK
 D02
 ACFAIL*
 D10
 +V1
 +V1
4
 GND
 D03
 BG0IN*
 D11
 +V2
 +V2
5
 MSD
 D04
 BG0OUT*
 D12
 RsvU-1
 RsvU-1
6
 GND
 D05
 BG1IN*
 D13
 -V1
 -V1
7
 MMD
 D06
 BG1OUT*
 D14
 -V2
 -V2
8
 GND
 D07
 BG2IN*
 D15
 RsvU-2
 RsvU-2
9
 MCTL
 GND
 BG2OUT*
 GND
 GAP*
 GAP*
10
 GND
 SYSCLK
 BG3IN*
 SYSFAIL*
 GA0*
 GA0*
11
 RESP*
 GND
 BG3OUT*
 BERR*
 GA1*
 GA1*
12
 GND
 DS1*
 BR0*
 SYSRESET*
 +3.3 V
 +3.3 V
13
 RsvBus1
 DS0*
 BR1*
 LWORD*
 GA2*
 GA2*
14
 GND
 WRITE*
 BR2*
 AM5
 +3.3 V
 +3.3 V
15
 RsvBus2
 GND
 BR3*
 A23
 GA3*
 GA3*
16
 GND
 DTACK*
 AM0
 A22
 +3.3 V
 +3.3 V
17
 RsvBus3
 GND
 AM1
 A21
 GA4*
 GA4*
18
 GND
 AS*
 AM2
 A20
 +3.3 V
 +3.3 V
19
 RsvBus4
 GND
 AM3
 A19
 SMB_SCL
 RsvBus5
20
 GND
 IACK*
 GND
 A18
 +3.3 V
 +3.3 V
21
 RsvBus6
 IACKIN*
 IPMB_SCL
 A17
 SMB_SDA
 RsvBus7
22
 GND
 IACKOUT*
 IPMB_SDA
 A16
 +3.3 V
 +3.3 V
23
 RsvBus8
 AM4
 GND
 A15
 SMB_ALERT*
 RsvBus9
24
 GND
 A07
 IRQ7*
 A14
 +3.3 V
 +3.3 V
25
 RsvBus10
 A06
 IRQ6*
 A13
 RsvBus11
 RsvBus11
26
 GND
 A05
 IRQ5*
 A12
 +3.3 V
 +3.3 V
27
 RsvBus12
 A04
 IRQ4*
 A11
 LI\I*
 LI\I*
28
 GND
 A03
 IRQ3*
 A10
 +3.3 V
 +3.3 V
29
 RsvBus13
 A02
 IRQ2*
 A09
 LI\O*
 LI\O*
30
 GND
 A01
 IRQ1*
 A08
 +3.3 V
 +3.3 V
31
 RsvBus14
 -12 V
 +5 V STDBY
 +12 V
 GND
 GND
32
 GND
 +5 V
 +5 V
 +5 V
 VPC
 VPC

Variation possibilities

These 5 terminations can be arbitrarily combined with one another:

VME
 System- management 0+1
 System- management
2+3		 ReservedBus
Differential
 ReservedBus
SingelEnded
Passive 3.3 V
 IPMB
 SingleEnded
 SingleEnded
 50 Ohm
Passive 5 V
 SingleEnded
 Differential
 Differential
 Not terminated
Active
 Differential
 Not terminated
 Not terminated

Not terminated


VPX 3 HE Serie 190
VPX 3 U Series 190
VPX 3 U Série 190
VPX 3 U Серия 190

B190350230 VPX Bus 3xVME 5xVPX terminiert nach Variante 02:
VME: Passiv 3,3 V terminiert
Systemmanagement 0+1: IPMB
Systemmanagement 2+3: Differential
ReservedBusD: Differential
ReservedBusSE: 50 Ohm		 VPX Bus 3xVMW 5xVPX terminated according to Variant 02:
VME: passive 3.3 V terminated
System management 0+1 IPMB
System management 2+3: differential
ReservedBusD: differential
ReservedBusSE: 50 Ohm		 Bus VPX 3xVME 5xVPX avec terminaison d'après la variante 02 :
VME : 3,3 V terminaison passive
Gestion système 0+1 : IPMB
Gestion système 2+3 : Differential
ReservedBusD : Differential
ReservedBusSE : 50 Ohms		 Шина VPX 3xVME 5xVPX с согласованием по варианту 02:
VME: В пассивном состоянии 3,3 В с согласованием
Управление системой 0+1: IPMB
Управление системой 2+3: Differential
ReservedBusD: Differential
ReservedBusSE: 50 Ом
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